1. Technical Field
The present invention generally relates to multi-processor data processing systems and in particular to operations on data processing systems configured with multiple processing units. Still more particularly, the present invention relates to a method and system of utilizing cache line sizes in parallel processing of distributed work across multiple processing units of a multi-core data processing system.
2. Description of the Related Art
Multi-core data processing systems are widely utilized to enable parallel processing of data that can be divided into portions for completion. There are various different topologies of multi-core systems, of which non-uniform memory access (NUMA) system topology is one example. In the past, allowance of attaching tuning attributes directly to memory objects, used in parallel processing of data, have not been implemented to tune software managed caches.